Chaintech 5IFM0 unofficial homepage


5IFM0-Picture Original Chaintech product page
Bios upgrades
Adding MMX support
Adding USB support
Going beyond 64 MB
Jumper settings

Adding MMX support

This board was designed to support MMX CPUs according to intels design plans.
These plans included a Vcore of 2.5V
Intel missed their target and to increase the Vcore to 2.8V, too late for this board.

Fortunately there are still two ways, to gain MMX-Support:
  1. Simply run a MMX CPU at 2.5V. Most CPUs from later production dates will work.
    You usually won't get faster than 166MHz with 2.5V.
  2. The onboard power plane can be very easily forced to produce 2.8V.
    Set up as described in the manual, but instead of a jumper (0 Ohm resistor)
    add a 2.7 kOhm resistor on the rightmost pins of JP13.
    I built myself a pluggable resistor, works great.
This will not take you to 233MHz (66MHz x 3.5) still, because of another intel *feature*.
The x1.5 Multiplier setting was reused as x3.5 with MMX-CPUs.
Instead of keeping the old resistor-values, valid from the beginning of the Pentium area,
intel decided to change them for no reason other than forcing the customer to buy new boards.

On all boards, produced before this issue was detected, the x1.5 (=x3.5) will not
work correct.
Here is the way round:

JP20,JP21 setup
Instead ofx1.5use forx3.5:

Thanks to AJZ for testing and this tip

Adding USB support

The board is supposed to support USB.
Check the Southbridge first.
If you find SU056 printed on it, forget about it, since this chip is buggy.
Marked with SU092 shows, that everything is fine. Find the empty place, where the USB header is supposed to be
(2x5 pin, near the COM-connectors)
and solder the header onto it's designed place.
The Pinout is:

FunctionVcc (5V)Data -Data +GNDN/C or Shield
FunctionVcc (5V)Data -Data +GNDN/C or Shield

Pin 1-side is marked by a big white triangle.
You'll need an USB-Extension-Bracket which either has this common layout or which can get coverted.
Enable USB in the Bios, install drivers and enjoy...

Going beyond 64 MB

Unfortunately the M101 version (maybe the M102 also) does lack the possibility to
extend the L2 cacheable range by adding a TAG-Ram on the board itself.
So every memory beyond 64 MB is L2-uncached and dead slow.
To make matters worse, most OS use the memory top down.
The only way seems to be a COAST-Module with an additinoal TAG-Ram.
As I don't have such a module, I wasn't able to test it.

Last Update: 08/21/2001